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1·Memory interface is a very important link in the DSP system design of TI company.

DSP和外部存储器接口是TI公司的DSP系统设计中的重要环节。

2·Like the memory interface, the other two interfaces are also based on Rambus technology.

与内存接口类似，其他两个接口也是基于Rambus技术的。

3·The S5PV210 is packaged in a 0.65mm pitch, 17x17mm2 FBGA package with a high performance 2-channel 32-bit DDR2 memory interface.

S5PV210处理器则采用0.65 mmpitch值的17x17平方毫米fbga封装，内部并集成了双通道32bit DDR2内存接口。

4·At the bottom of the blurred diagram are what looks like 6 MCs, which confirms the 384-bit memory interface we reported earlier.

在模糊图的底部是什么像6管委会，这印证了384位内存接口，我们曾报道外观。

5·The half-height Quadro 600 covers the entry level with 96 stream processors, 1GB of DDR3 RAM, a 128-bit memory interface, and a $199 MSRP.

而Quadro600则定位于“入门级”，内含96个流处理器，1GB GDDR3显存，128bit显存位宽，建议零售价199美元。

6·The memory interface connects XDRAM chips, which currently is the fastest available memory technology, substantially faster than current DDR or DDR2 interfaces.

内存接口连接xdram芯片，它是目前速度最快的一种内存技术，速度远比目前的DDR和DDR2接口更快。

7·This high-speed data acquisition card designed is based on PCI bus and have high capacity memory interface. It combines high-speed date acquisition and high capacity real-time memory.

为此，本文设计了一款基于PCI总线且具备可扩展大容量存储设备接口的高速模拟信号采集卡，将高速数据采集和大容量实时存储结合在一起。

8·Both these modification levels made dramatic improvements on the memory footprints and the user interface.

这两个修改级别在内存占用和用户界面方面做了很大的改进。

9·The framework responds to events on the interface in ways that affect the model, and all of this happens in the same memory space on the workstation.

框架可通过多种会影响模型的方式对界面上的事件作出响应，所有这些响应都是在工作站上的同一内存空间中完成的。

10·The graphical user interface provides browsing capabilities for verifiing suspected memory leak regions, and for understanding the data structures that comprise these leaking regions.

图形用户界面提供浏览功能，以便验证可疑内存泄漏区域和了解组成这些泄漏区域的数据结构。